Atari ST Disk System

1 November 2004

WinSTon is proving quite useful, as its source is quite understandable - with the exception of the ASM portions of it. When it was originally conceived, it was the first Direct-X one and unfortunately was really only geared up to meet the needs at a time when the only images floating around the net were “compact cracks”. It was never designed to run the original media since nothing like IPF images were available, so there was little point in putting in the effort needed to emulate the disk system properly. The code that is related to FDC emulation more-or-less just seeks in a direct memory dump, i.e. moving an offset and copying 512 bytes of data at a time. This is usually fine for normal disk images of cracks and public domain software, but it will just not work when using the real (virtual) media. So, we decided to improve it.

We could have done the same that we did for the Commodore Amiga and testbed the chip, but that is very time consuming, so we would prefer not to do that again when documents publicly exist to tell us all we need to know (unlike the Amiga).

We have all the official WDC1772 datasheets and understand electronic characteristics and so have now worked out how it interfaces with the other devices that will need to be emulated properly. We made some FDC test programs for some undocumented features / cases and spent almost two days running them to confirm or deny assumptions about the DMAC behaviour as well as the correct wiring of the DMAC FDC lines, signals and so on.

Today, all the FDC code in WinSTon was eliminated apart from register/IO mapping ready to start from scratch. Then we made a new mapping that better represents how the real hardware works.

Here is a technical overview of what we are doing:

• Complete DMAC (DMA controller) emulation
• Proper signals
• Proper timing
• DMAC FIFO (see below)
• DMAC interface to the FDC - what is called the FDC in the emulator is in fact a DMAC interfacing with the WDC1772 controller.
• DMAC signalling, including proper and separated FDC and DMAC errors like on the real hardware.
• DMAC operation on memory
• DMAC data interface using DRQ with FDC
• How unmapped registers behave.
• And various other things like the above...

The DMAC buffers data from the FDC DR using the DAL lines with DRQ. DRQ (data request) is set whenever DSR (data shifter) has a complete byte of data. When the FIFO buffer is full, it transfers the whole contents into the system memory. However, its addressing is limited (just like on the Amiga with its chipram). On writing, the DMAC reads the complete FIFO then each DRQ signal it transfers the contents to the FDC DR. When the FDC DR is transferred it is moved to the DSR (data shifter), and so on...

Unfortunately all this is needed once you go into signal-level emulation. In fact it is probably not possible to create an accurate representation of the disk system without using test programs on the real hardware, even if you have the official datasheets and understand electronics. This emulation might still might not be 100%, but probably 99.9% close to the real thing.